Contents
1 Introduction
11 Describing Structure 
12 Describing Behaviour 
13 Discrete Event Time Model
14 A Quick Example
2 VHDL is Like a Programming Language 
21 Lexical Elements 
211 Comments 
212 Identifiers
213 Numbers 
214 Characters
215 Strings 
216 Bit Strings
22 Data Types and Objects 
221 Integer Types 
222 Physical Types
223 Floating Point Types
224 Enumeration Types
225 Arrays
226 Records 
227 Subtypes 
228 Object Declarations 
229 Attributes 
23 Expressions and Operators 
24 Sequential Statements  0
241 Variable Assignment
242 If Statement 
243 Case Statement
244 Loop Statements 
245 Null Statement 
246 Assertions 
25 Subprograms and Packages 
251 Procedures and Functions 
252 Overloading 
253 Package and Package Body Declarations 
254 Package Use and Name Visibility 

3 VHDL Describes Structure 
31 Entity Declarations 
32 Architecture Declarations 
321 Signal Declarations 
322 Blocks 
323 Component Declarations
324 Component Instantiation 
4 VHDL Describes Behaviour 
41 Signal Assignment
42 Processes and the Wait Statement 
43 Concurrent Signal Assignment Statements
431 Conditional Signal Assignment 
432 Selected Signal Assignment 
5 Model Organisation 
51 Design Units and Libraries
52 Configurations
53 Complete Design Example
6 Advanced VHDL 
61 Signal Resolution and Buses
62 Null Transactions 
63 Generate Statements
64 Concurrent Assertions and Procedure Calls
65 Entity Statements 
7 Sample Models: The DP32 Processor
71 Instruction Set Architecture
72 Bus Architecture
73 Types and Entity
74 Behavioural Description
75 Test Bench
76 Register Transfer Architecture
761 Multiplexor 
762 Transparent Latch 
763 Buffer 
764 Sign Extending Buffer
765 Latching Buffer
766 Program Counter Register 
767 Register File 

768 Arithmetic & Logic Unit 
769 Condition Code Comparator
7610 Structural Architecture of the DP32

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